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Silicon Labs /BGM220PC22HNA /MODEM_S /SRCCHF

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Interpret as SRCCHF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SRCRATIO10 (SRCENABLE1)SRCENABLE1 0SRCRATIO20 (SRCENABLE2)SRCENABLE2 0 (X0)BWSEL 0 (INTOSR)INTOSR

BWSEL=X0

Description

No Description

Fields

SRCRATIO1

I-channel SRC ratio
SRCENABLE1

SRC1 enable
SRCRATIO2

Q-channel SRC ratio
SRCENABLE2

SRC2 enable
BWSEL

Channel filter bandwidth

0 (X0): wide bandwidth selected ; BW = 0.263*Fxtal/dec0-factor/dec1-factor

1 (X1): wide bandwidth selected ; BW = 0.263*Fxtal/dec0-factor/dec1-factor

2 (X2): narrow bandwidth selected ; BW = 0.196*Fxtal/dec0-factor/dec1-factor

3 (X3): narrow bandwidth selected ; BW = 0.196*Fxtal/dec0-factor/dec1-factor
INTOSR

Forcing Integer OSR

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data